Engineer · Researcher · Educator

I'm a CPU Microcode Engineer at Intel Corporation, where I work on the microcode of the CPU cores for current and next-generation processors. Before that, I worked as a Logic Design Engineer in the same company, developing the Resource Controller IP and designing registers for Intel SoC platforms that included power and performance optimizations.

I hold a Ph.D. in Electrical Engineering from the University of North Texas, where my research produced novel algorithms and hardware architectures for Error Correction Coding and cryptography, optimizing existing codes for power and area and developing improved ones. That work spanned RTL design and verification in VHDL and SystemVerilog on 45nm and 28nm CMOS, plus full-custom CMOS circuits in Cadence Virtuoso on a TSMC 180nm process taken through physical design, DRC checks, and layout. I've published 7 peer-reviewed papers, serve as Editor in Chief at Applied Science and Innovative Research, and sit on the editorial board of the Journal of Education and Culture Studies.

Outside of work, I write about hardware design, computer architecture, and the intersection of EDA tooling with modern engineering practice. The best engineers are the ones who can reason across abstraction layers — from transistors to system architecture.