Engineer · Researcher · Educator

Dr. Anirban Chakraborty

CPU Microcode Engineer at Intel
Ph.D. in Electrical Engineering
Editor in Chief — ASIR

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Years Experience

Projects

Publications

Technologies

Featured

Featured Project

Yantra — CPU Design from Scratch

A ground-up CPU RTL design in SystemVerilog — from combinational building blocks through a fully pipelined processor, with open-source tooling.

systemverilogcpu-designcomputer-architecturedigital-designyosys

What a Computer Is

A friendly introduction to what a computer is and what it does. We define computation, separate hardware from software, see why putting programs and data in the same memory changed everything, distinguish architecture from implementation, and trace what actually happens when a small C program runs.

computer-architecturefundamentalsvon-neumannstored-programisa

Recent Blog Post

ACH-NEOVIM: A Step-by-Step Tutorial to a Supercharged Neovim

A walkthrough of ACH-NEOVIM — my personal Neovim configuration that bootstraps a 45+ language IDE with one command. 75 dark themes, on-demand tooling, org-mode, HDL support, and zero manual setup.

neovimluatoolsproductivitytutorial

terminal
$ whoami
Dr. Anirban Chakraborty — CPU Microcode Engineer @ Intel
$ cat skills.json | jq '.primary[]'
"CPU Microarchitecture"
"RTL Design & Verification"
"SystemVerilog / VHDL / UVM"
$ cat education.txt
Ph.D. Electrical Engineering — University of North Texas
$ echo $MOTTO
From silicon to systems — engineering at every layer.
$ ▎
$ ▎

About Me

From Silicon to Systems

I'm a CPU Microcode Engineer at Intel with a Ph.D. in Electrical Engineering. My work spans microcode development, RTL design, and reconfigurable computing research. I serve on two editorial boards and have published 7 peer-reviewed papers.

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Technologies I Work With

SystemVerilogVHDLVerilogPythonCMATLABSynopsys DCPrimeTimeCadence VirtuosoModelSimSystemVerilogVHDLVerilogPythonCMATLABSynopsys DCPrimeTimeCadence VirtuosoModelSim

Xilinx VivadoIntel QuartusJaspergoldVerdiRTL DesignPhysical DesignFPGAUVMTclLinuxXilinx VivadoIntel QuartusJaspergoldVerdiRTL DesignPhysical DesignFPGAUVMTclLinux

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